The Blinking Computer

I like the idea of 'shift register' memory because then I can use a 1 bit ALU which keeps things very simple.

Here are all the weird ideas I've thought about for shift register memory:

If 32 bits wer stored in a 2m tube then that's just over 6cm a bit. Let's assume that's six wavelengths, so one is 0.01m and with the speed of sound at 340m/s that makes 34kHz or thereabouts. This seems just about possible, it's in the range of acoustics I know a little bit about. In order to transport the finished machine, and to hang it on the wall, the maximum dimension has to be 2m.

I originally started off with the idea of using 40kHz ultrasonic transducers. However, after playing about a bit I find that they have less than 5kHz bandwidth. In general any piezo transducer has a resonant frequency and so limited bandwidth (ref). Whilst it's great to filter out the low frequency background noise, I need more bandwidth to fit the bits into a 2m tube.

Recently I've found that small electret microphones can have a 30kHz frequency response. The idea of building a 32 bit computer is very appealing, so this is where my effort is going at the moment. potential speakers

The clock rate is dependent on the tube length, so at 2m length that's only 170 instructions a second! It's almost a shame it's not slower, then we'd be able to see the computer working. I'll probably hack in hardware NOPs to make everything run at about 1Hz and be visible.

TVs used to be analog and use ultrasonic delay lines (YouTube: Inside a PAL Delay Line, Delay line memory, Glass Delay Lines Part 2 ) Let's assume that we could store 32 bits in the 64μs delay (use ~4MHz carrier), then that's a 'instruction' rate of about than 16kHz which is acceptable. A bit-sliced ALU would have to run at 32 times faster than that, or 500kHz, which is pushing my skills.

A cheap eBay laser pen claims to have a 10 mile range, that's 53μs, about the same time delay as the PAL line. I can't imagine getting 16 of these working with line of sight or mirrors parallel enough to get multiple reflections, but someone else may know how to (Free-space_optical_communication). It seems that 24 core optic fibre comes in at about $240 per km, so if the rest was built in TTL it may work (much faster than acoustic).

The start of the ionosphere is 75km up, if the bounce was clean (which it won't be) the Shortwave_radio would give a 0.5ms delay. It would have to be quite broadband, but Spread_spectrum >50MHz is licence free. The real problem is the bounce has no chance of being clean. We can detect lasers on the moon and used to bounce communications off the moon before we had satellites. The round trip is about 2.6s, so the clock speed would be low. It also needs GHz or very high power, which runs into Radio spectrum licencing issues.

Cassette tape runs at 4.75 cm/s and can store at 300 or 1200 bps (BBC model B). Say 64 registers at 64 bits each, so need 4096 bits on tape and instruction cycle is about 12s or 4s. Really don't need much tape - only 60cm max. Interesting. Very very slow CPU - if design variable speed read/write then can speed up via driving motor. Push to max speed, 2560 bps and 16 bits in 16 registers - then 10 Hz…

A soloniod can release/retain a water drop, the presence of which can be detected (say) 1m below. It turns out that timing water drops is really difficult.

2m of polycarbonate tube with internal diameter of 7mm may support a 3mm bubble. If we leave about four bubble diameters so they don't merge (just a guess), then we may fit 128 bits into one tube. Very visual - I want visual memory if at all possible, https://hackaday.com/2019/12/20/tiny-bubbles-in-the-clock/. As solonoid valves are used for the air bubbles this tilts in the direction of a relay computer…

Phosphorescence using Strontium aluminate. One large circle with (say) 1025+-1 dots of phosphorescent paint (or maybe 32 circles of 33+1 dots so that all registers can be seen). These are read, erased and written using light. A red LED erases, the difference of light levels before and after erasing say whether the dot was charged or not. On the next clock cycle the dot is written again. Green is the strongest, red LED erases. This has the huge advantage that the memory is visible and the clock speed is independent of the memory - phosphorescence can last hours and we only need minutes. If the disk is static and the read/write head rotates then the memory will be visible. Holes can be punched in the disk radially to the dots to give timings, then the clock is derived from the rotor speed. Alternatively use a tape loop, that's a lot like Colossus.

Not well thought out, but a rotating metal drum with magnets in one of two positions might work. The idea is that it would be possible to read and write the position using electromagnets.

I have a two-transistor memory cell which can drive a LED. It should be possible to store the output on a capacitor and so chain these. The idea is that the capacitor stores the previous output and all the read select lines are pulsed at once, so moving a bit pattern one step down. This may well require an additional resistor so that the capacitors don't change state whilst the memory cells are updating.

LED strip lights (WS2812B family or ws2812 alts) are cheating, but at 5p a memory cell and already wired up it's very tempting, especially if a 32 bit or 64 bit processor. The 4-connector options (GND, VCC, CLK, DATA) e.g. APA102 look better than 3 (GND, VCC, DATA) as maybe DATA can be fudged to 0V (black) or VCC (white) on each CLK. However, APA102 are hard to come by, at about 17p/bit. The APA102 replacement, SK9822 is bad as it needs a signal to display the result. Alternatively, use ws2812b/ws2813 and generate two DIN signals, one for 0 and one for 1, then use transistors to switch in the appropriate signal at the start of the shift register - it's still 450Hz not 17kHz of APA102.

In an ideal world the computer would operate at very low frequencies and all state would be visible. However, many of the options above preclude this, e.g. shift registers from acoustic delay lines. persistance of vision may work well here. The sysmem can be halted between instructions even if delay lines have to keep ciruclating to keep information stored. Lasers wired to output bits and a mirror rotating using a stepper motor should project the internal state onto a display (e.g. wall) and so make everything visible.

If you've got this far, Hard(er) drives is worth listening to.